1. Field of the Invention
The present invention relates to a method of patterning a pixel electrode of a liquid crystal display (LCD) device including a switching element for driving and controlling a liquid crystal. More specifically, the present invention relates to a patterning method for manufacturing a liquid crystal display having a TFT (thin film transistors) functioning as a switching element in which a passivation layer covers the TFT and a pixel electrode is connected to an output electrode of the TFT on the passivation layer, and also relates to a structure of a liquid crystal display device manufactured by this method.
2. Description of the Background Art
Conventionally, an LCD has a structure as shown in FIG. 1 which illustrates a plane view of an enlarged LCD panel. A gate line 17 is arranged to extend in a horizontal direction and a data line 15 is arranged to extend in a vertical direction which crosses the gate line 17 perpendicularly. At the intersection portion of the gate line 17 and the data line 15, a TFT including a gate electrode 17a, a source electrode 15a, a drain electrode 15b and a semiconductor layer 22 is formed. A passivation layer (not shown) is formed thereon. A pixel electrode 4 connected to the drain electrode 15b is formed on the passivation layer.
When patterning the pixel electrode 4 according to the conventional method, the actual patterned shape is often different from the originally designed shape or desired shape. FIG. 2 shows the typically distorted shape of the pixel electrode 4 after being patterned by the conventional method.
The dotted line 55 in FIG. 2 is the boundary of the originally designed shape of the pixel electrode 4. As seen in FIG. 2, the pixel electrode 4 has a distorted boundary portion having a width W2 and tearing-off portions 20 in the pixel electrode. Here, W1 is a width of the data line 15.
Referring to FIGS. 3a-3j which are cross-sectional views cut along the axe2x80x94a line of the FIG. 1, a conventional method for manufacturing the LCD will be explained in order to illustrate the reason for the pixel electrode having an undesired pattern shown in FIG. 2.
On a transparent substrate 11, a metal selected from the group of aluminum (Al), aluminum alloy, chromium (Cr) or molybdenum (Mo) is deposited to form a first metal layer 50. A photo resist 51 is coated on the first metal layer 50 as shown in FIG. 3a. 
The photo resist 51 is patterned to have a predetermined shape. Using a wet etching method, the first metal layer 50 is patterned according to the shape of the photo resist 51 to form a gate line (not shown) and to form a gate electrode 17a which is derived from the gate line. Then the remaining photo resist on the gate line and the gate electrode 17a is removed as shown in FIG. 3b. The gate electrode 17a can be anodized to eliminate hillocks thereon. In addition, the cross-sectional shape of the gate electrode 17a preferably has a tapered shape.
On the substrate having the gate electrode 17a, a gate insulating layer 23 including an inorganic insulating material such as SiNx or SiOx, an amorphous silicon (or a-Si) 52 and an n+ type impurity doped a-Si (or N+ type a-Si) 53 are sequentially deposited. A photo second resist 61 is coated thereon as shown in FIG. 3c. 
The second photo resist 61 is patterned to have a predetermined shape. According to the patterned second photo resist 61, the a-Si material 52 and the n+ type a-Si material 53 are simultaneously etched to form a semiconductor layer 22 and an ohmic contact layer 25. The remaining second photo resist 61 on the ohmic contact layer 25 is removed as shown in FIG. 3d. 
A second metal layer 54 including chromium or aluminum is deposited and a third photo resist 63 is coated on the second metal layer 54 as shown in FIG. 3e. 
The third photo resist 63 is patterned to have a predetermined shape. According to the patterned third photo resist 63, the second metal layer 54 is patterned via a wet etching method to form a data line 15. At the same time, a source electrode 15a derived from the data line 15 and a drain electrode 15b which faces the source electrode 15a are formed on the ohmic contact layer 25 whereas the source electrode 15a and the drain electrode 15b are separated via a distance. The n+ type a-Si material 53 between the source electrode 15a and the drain electrode 15b is removed via a dry etching method using the source electrode 15a and the drain electrode 15b as a mask. The remaining photo resist on the source electrode 15a and the drain electrode 15b is removed as shown in FIG. 3f. 
A passivation layer 26 including an organic material such as BCB (or benzocyclobutene) is coated thereon via a spin coating method. A fourth photo resist 65 is coated so as to have a thickness that is less than a thickness of the passivation layer 26 as shown in FIG. 3g. 
The fourth photo resist 65 is patterned to have a predetermined shape. According to the patterned fourth photo resist 65, the passivation layer 26 is patterned via a dry etching method to form a contact hole 30 which exposes a portion of the drain electrode 15b. The remaining fourth photo resist 65 on the passivation layer 26 is removed as shown in FIG. 3h. 
On the passivation layer 26, an ITO(or Indium Tin Oxide) 55 is deposited so as to have a thickness of about 500 xc3x85. On the ITO layer 55, a fifth photo resist 67 is coated as shown in FIG. 3i. 
The fifth photo resist 67 is patterned to have a predetermined shape. According to the patterned fifth photo resist 67, the ITO layer 55 is patterned via a wet etching method to form a pixel electrode 4 as shown in FIG. 3j. 
In the above mentioned conventional method, because the passivation layer 26 has a lower dielectric constant (lower than 3.0) than the inorganic material and forms an organic insulating layer(BCB) which can even a surface property thereof, the pixel electrode 4 disposed on the passivation layer can be overlapped with the data line 15 so that the aperture ratio can be maximized.
However, after the passivation layer 26 including an organic material such as BCB is patterned by using the fourth photo resist 65 as shown in FIGS. 3g and 3h, the surface of the patterned passivation layer 26 can be rough and uneven.
If the pixel electrode 4 is formed on the uneven surface of the passivation layer 26, the patterned pixel electrode 4 has distorted edge portions and tearing-off portions as shown in FIG. 2.
The cause of the formation of the distorted pattern is explained hereafter in detail.
When the passivation layer having an Si bond structure such as BCB is patterned, the substrate which has the passivation layer and patterned photo resist is inserted into an etching chamber filled with an etching gas such as O2/SF6 or O2/CF4. The portions of the passivation layer exposed through the patterned photo resist are removed by changing a volatile material SiF4 according to the chemical reaction of the Si functional group of the passivation layer and the F radical of the SF6 or CF4. At the same time, the photo resist is removed by etching with O2 gas.
As the etching speed of the passivation layer and the etching speed of the photo resist is similar, the thickness of the photo resist is the same as that of the passivation layer. So, when the patterning of the passivation layer is finished, the photo resist is almost completely removed.
However, it is very difficult to coat the photo resist to have a uniform thickness. Therefore, after the patterning of the passivation layer is finished, the portions where the photo resist is thicker have some remaining photo resist. Otherwise, at the portion where the photo resist is thinner, some surfaces of the passivation layer are over-etched by the etching gas as shown in FIG. 4.
For example, when O2/CF4 is used as the etching gas, the ratio of the composed atoms at the surface of the over etched passivation layer is determined to be Si:C:O:F=2-3:58:24:10. Even if the surface is treated with O2 gas, the surface of the passivation layer is still uneven because of the F radical.
If the ITO layer is deposited on the uneven passivation layer, the ITO is not deposited at the convex portions 20 which have the extruded passivation layer as shown in FIG. 5. A photo resist is then deposited and patterned on the ITO layer 60 which is not uniformly deposited. When the ITO layer 60 is patterned according to the patterned photo resist, the pixel electrode does not have the originally designed shape. For example, the edges of the pixel electrode 4 do not reach the portion A and therefore, the edge of the pixel electrode has a reduced width W.
Therefore, the aperture ratio of the pixel electrode cannot be maximized. Furthermore, since the tearing-off portion of the pixel electrode does not generate an electrical field for driving the liquid crystal, the picture quality is inferior.
To overcome the problems described above, preferred embodiments of the present invention provide a method for patterning a thin layer to have an originally designed shape. Preferred embodiments of the present invention also provide a method for patterning a pixel electrode to have an originally designed shape. Another preferred embodiment of the present invention provides a method for manufacturing an LCD having a pixel electrode of which an aperture ratio is maximized. In addition, another preferred embodiment of the present invention provides a method for manufacturing the LCD which has a high picture quality resulting from a desired patterning of the pixel electrode.
In order to overcome problems with the conventional method and to achieve the advantages described in the preceding paragraph, preferred embodiments of the present invention provide a method of patterning the passivation layer which includes the steps of coating a photo resist to have a thickness of more than about 1.2 times of a thickness of the passivation layer, patterning the photo resist to have a predetermined shape, etching the passivation layer according to the patterned photo resist, removing the remaining photo resist and treating the surface of the passivation layer so as to form an SiO2 thin layer on the passivation layer using O2 gas and forming a pixel electrode on the passivation layer by depositing and patterning an ITO layer.
According to preferred embodiments of the present invention, even after the patterning of the passivation layer is finished, a thin photo resist layer still covers the passivation layer. Because the photo resist is about 1.2 times thicker than the passivation layer when patterning starts, all surfaces of the patterned passivation layer can be covered by the photo resist, after patterning ends even if the thickness of the photo resist is not uniform. Therefore, the passivation layer does not contact the etching gas so that the passivation layer is not over-etched by the etching gas.
After that, the remaining photo resist is removed via ashing with O2. Then preferably, the ashing process continuously treats some surfaces of the passivation layer so that a thin SiO2 layer is formed on the passivation layer.